1. Field of the Invention
The present invention relates to memory management, and more particularly to a method and apparatus for flash ROM management.
2. Description of the Related Art
Computer systems include various types of memory devices. Some memory devices are referred to as “volatile” meaning that data stored therein will be lost if when powered off. Other memory devices are “non-volatile” meaning that data is retained when powered off.
Volatile memory, such as dynamic random access memory (DRAM), or more specifically synchronous DRAM (SDRAM), is typically employed as the main memory of a computer. When booted, the computer operating system is loaded to the main system memory and executed by the processor. As applications are opened they are copied from the storage drive (e.g., hard drive, CD-ROM drive) into the main system memory for execution. The main system memory is also used to temporarily store data, configuration, and other types of information that the computer may require during operation.
Non-volatile memory is useful for storing software code that the computer may execute each time it is booted, typically referred to as firmware. Most computers have a set of executable routines called the basic input/output system (BIOS). Said routines provide access to various input and output devices such as floppy disk drives, displays, and the like. The BIOS is permanently stored in a non-volatile memory device called a read only memory (ROM).
It may be desirable to update the firmware stored in the ROM to enhance performance for example, and some types of ROM devices permit firmware updates, and electrically erasable programmable read only memory (EEPROM) ROM is an example. To reprogram an EEPROM (a process referred to as flashing the ROM), the data stored therein is first erased and new data is then stored in the device.
Of the ROM devices which are compatible with low pin count interface specification revision 1.1 (LPC 1.1), the most commonly used are flash ROMs which are typically coupled to a motherboard. The flash ROM stores the system BIOS, the operating system and various application data.
Two types of flash ROM, LPC flash ROM and firmware hub flash ROM forwarded by the Intel Corporation, are adaptable by current motherboards. These two types of flash ROM have different bandwidths and are accessed by isolated memory cycles with particular command sets. The selection of flash ROM type is based on the requirements of the motherboard designer (e.g. cost, performance, and function). FIG. 1 is a timing diagram of conventional LPC memory cycle. FIG. 2 is a timing diagram of a conventional firmware hub memory cycle. Although both cycles use the “LFRAME#” bus line to provide a starting signal, the information content, such as controlling signals, commands, or data, transferred via four “LAD” bus lines associated with specific timing, is different.
Only one type of flash ROM can be disposed on a motherboard, hence, in order to accommodate both types of flash ROM, two host versions have been provided respectively, resulting in extra cost. It is therefore necessary to produce a single host version providing the ability to utilize both types of flash ROM. It is additionally, necessary to determine which type of flash ROM is present before the power on self test (POST) procedure is conducted.
In a firmware hub flash ROM, multiple ROM devices of various sizes can be disposed on a motherboard. To accommodate all ROM devices, each ROM device is allocated address space equal to the address space required by the ROM device with the largest memory capacity. Although the solution above is feasible, several problems remain. It is unnecessary to allocate redundant address space to a firmware hub flash ROM which has a smaller memory capacity. For example, to allocate address space to a flash ROM with 64K capacity when a 256K address space is allocated to another ROM device, 192K of excess address space goes unused. Hence, an additional need exists for an apparatus and method of flash ROM management to precisely allocate address space corresponding to the actual capacity of firmware flash ROMS.